Acoustic noise emission is one of several physical design issues addressed during the design of telecommunications and information technology equipment. In most systems, noise is a by-product of the air-movers used for system cooling. The amount of heat dissipated in electronic systems cooled by forced convection is directly proportional to volumetric flow rate. The flow rate, in turn, is directly proportional to the rotational speed (N) of the air-mover. Dimensional analysis and laboratory measurements have shown that when the rotational speed of a typical air-moving device increases by a factor of N, the corresponding increase in the sound power level, LW (in bels), can be estimated using:
LW = A log (N)
where 5.0 <A < 5.5 . For reference, a relatively quiet system will have a sound power value of 3.5 – 4.5 bels, whereas emission levels above 7.0 bels will result in local sound pressures that will be considered to be quite loud, or even harmful at higher levels. In the world outside electronics, a vacuum cleaner might be near 7 bels while a jet engine might be near 15 bels .
Given the strong dependence of noise level upon heat dissipation, trends in noise emission are inextricably related to developments in integrated circuit and printed wiring board design. The intent of this paper is to briefly discuss projected trends in chip and board design, and then assess the impact on noise emission.
Over the past few decades, many electronic system design groups have incorporated noise control measures into their products. The primary design changes were the integration of fan speed control, system flow impedance reductions and improvements related to air-moving device inflow/outflow conditions . It is not unusual for such changes to provide 1-2 bels (10-20 dBA) of noise reduction.
When designing telecommunications or information technology equipment, manufacturers rely on a variety of benchmark documents. For the telecommunications industry, one such document is a recently published standard created by the European Telecommunications Standards Institute (ETSI) . The ETSI document specifies a set of sound power limits for equipment sold in Europe. Similarly, a few individual countries have produced similar documents for the computer and business equipment industry.
For example, the Swedish Agency for Administrative Development (Statskontoret) produced one of the first of these several years ago . While many relevant noise documents are designed to protect the health and safety of workers ., the European documents are principally intended to ensure that equipment does not excessively impact speech communication, task concentration, and other perceptual factors in spaces where equipment is installed. In general, the limits in these documents have not been primary design drivers for manufacturers since the limits could often be met using conventional noise control techniques. As a result, noise emission has usually been a relatively low-priority design issue.
With very few exceptions, the general trend in telecommunication and information technology system design has been toward increasing heat loads. Consequently, for systems that must be cooled using forced-convection, noise emission is also rising. These trends are driven primarily by customer demand for increased system throughput, and decreased enclosure size [6,7]. For these industries, the dramatic increase in Internet access has rapidly driven data rates up.
Over the period from January, 1996 to January, 1997, the number of addressable Internet domains quadrupled . Soon, as convergent systems become widely deployed, single networks will carry data, voice and video. The speed at which these changes will occur is likely to mean that many design assumptions and specifications will need to be constantly revisited. System power (i.e., heat) dissipation is driven by performance trends at both the integrated circuit and printed wiring board level. The next two sections discuss trends in chip and board design, and the likely effects on noise emission.
Integrated Circuit Design
Because of the financial and social impact of the electronics market, trends in semiconductor design have been well documented. Similarly, there has been a concerted effort by industry groups and government agencies to provide projections regarding future integrated circuit designs. With regard to heat dissipation, there are important market drivers toward both lower and higher dissipation values.
There are two key drivers toward lower dissipation values. The first is a desire to avoid pushing dissipation to levels that will require the use of non-traditional cooling schemes. Figure 1 contains dissipation and power data for a number of different high-end processors, as well as data from computational studies . As can be seen in the figure, the generally accepted chip dissipation limit for forced convection cooling is in the vicinity of 1 W/sq.cm.1
1. Various published papers use this limit but there is clearly a range in the design community’s view. In systems where extremely high reliability is required (e.g., military avionics systems), forced convection cooling is used up to a limit of roughly 0.3 W/sq.cm. Conversely, there are commercial forced-convection cooled systems where 2 W/sq.cm. chips are being used.)
Figure 1: High-end processor dissipation and cooling technology map.
The second driver away from increased dissipation is a broad push to reduce power consumption. This trend is driven by a broad array of forces ranging from general DFE (Design For the Environment) strategies to the need to reduce the restrictions that battery life puts on portable computing/communication devices. For large scale electronic systems (e.g., telecom transmission and switching facilities), reduced power consumption translates into operating cost reductions which can be significant over the lifetime of the systems.
In opposition to these effects are a number of drivers which are pushing chip dissipation levels up. The two most significant drivers are the continued demand for higher throughput and for increased on-chip circuit densities. Projections for clock speed and circuit density growth, as published by the Semiconductor Industry Association (SIA), are shown in Figures 2 and 3.2 The clock speed data is specified for two categories of microprocessors: “high” performance and “cost” performance.
2. The SIA report was composed with the support of NIST; NSF; the Departments of Commerce, Defense and Energy; Semiconductor Research Corporation and SEMATECH (an industry consortia); and various universities.)
Figure 2: Projected on-chip clock frequencies for “cost performance” and “high performance” integrated circuits.
Figure 3: Projected transitor densities for high volume �-processors and low volume ASICs.
For the period 1995 to 2005, the clock rates for these devices are anticipated to grow by factors of 3.2 and 2.9, respectively. The density data is specified for low cost, high volume microprocessors and for low volume ASICs. Over the same time period noted above, the growth factor for both types of ASICs is projected to be 8.5.
Based upon these projections, and with consideration of all other design drivers, the SIA report provides power dissipation estimates for high performance microprocessors and ASICs. This data is shown in Figures 4 and 5. Again using the period from 1995 to 2005, the dissipation growth factor for microprocessors is 1.8. The ASIC dissipation is expected to double between 1995 and 2001, and then remain flat.
Figure 4: Projected power dissipation values for high performance microprocessors.
Figure 5: Projected power dissipation values for high performance ASICs.
Printed Wiring Board Design
With regard to circuit board design, the primary dissipation drivers are similar to the chip drivers noted above. While there is a corresponding desire to use conventional cooling techniques and keep power consumption low, there are also similar pushes in terms of board throughput and circuit pack densities. These figures tend to be proprietary so industry data is scarce. Figure 6 contains current and projected density data for 11 different boards used in Lucent products. The ten-year growth rate factors for these products range from 3.2 to 9.9. Assuming that this data is generally representative, circuit pack densities are clearly rising at a rapid pace.
Figure 6: Actual and projected circuit pack densities for 90 printed wiring board designs.
Lucent has also collected board heat dissipation on 90 different board designs. The data is relatively flat from mid-1991 (i.e., the start date of the data set) until mid-1996. The average power dissipation over that period is 0.035 W/sq.cm. In contrast, some new designs are at 0.2 W/sq.cm., a 5.7 factor increase in dissipation.
Acoustic Noise Emission
Since chip dissipation levels and board densities are projected to increase, it is clear that system dissipation levels will continue to rise well into the next century. Unfortunately, there are no available projections for system level dissipation growth rates. However, given the chip and board level trends discussed above, it would be conservative to say that the dissipation levels will grow by a factor of two in the next five-to-ten years. This would result in a 1.5 bel (15 dB) rise in noise emission level. At the other extreme, a four-fold increase in dissipation would result in a 3 bel (30 dB) rise in level.
In general, system noise level increases of 1-3 bels would be problematic. First, the increased noise would adversely impact many people, and purchasers of the equipment could be expected to require manufacturers to reduce noise emission. Second, many systems would no longer be in compliance with national and international noise emission/immission requirements. If such a scenario unfolds, noise emission will become a primary design issue, and significant effort will be needed to prevent noise emission from becoming a limit on overall system performance. The first systems where problems will occur will be those where throughput demand is growing the fastest.
The trends discussed above apply primarily to equipment intended for indoor installation. The situation for outdoor equipment is less clear. One problem is that well-defined sets of outdoor noise emission limits do not exist, leaving designers without appropriate benchmark information. ETSI and other standards bodies are attempting to create a set of limits, but there are difficult technical and political obstacles to overcome. A second problem is that there is very little outdoor-product noise-emission data currently available. Thirdly, wireless telecom equipment will be the dominant equipment type to be deployed outdoors in the near term, and the designs are rapidly changing.
While these problems make it difficult to create a rational prediction regarding outdoor equipment, there needs to be a general recognition that when limits are set, they could be quite low. The primary concern that will drive the limits down will be the possibility of installations on (or near) apartment buildings, hospitals and other dwellings. As wireless cell sizes decrease, the likelihood that equipment will be installed near sleeping areas will increase. In the noise control arena, sleep interference problems generate the most vehement responses. If the equipment radiates levels that are above nighttime ambient sound pressure levels (typically 20-40 dB below daytime levels in densely populated areas), there will be a steady stream of complaints. If the radiated noise contains prominent tones, the tolerance will be even lower.
Issues such as these add a level of complexity for regulatory bodies and manufacturers since wide variation in installation environments must be considered. It is unclear how these issues will be resolved.
Power dissipation data clearly points toward increasing thermal loads for telecommunication and information technology systems. This rise is occurring because the drive toward higher system throughput with decreased cabinet footprint is stronger than the drive toward reduced power consumption. As these heat loads rise, there will be a corresponding increase in acoustic noise emission. The design trend data indicates that noise emission is likely to rise by 1-2 bels (10-20 dB) over the next five-to-ten years.
Given the proliferation of desktop workstations, it is also important to note that fans in these systems control the background noise levels in many office environments. While people have grown accustomed to this added noise, the negative effects of fan noise will likely become more apparent as hands-free desktop conferencing becomes more widespread. Very little noise research has been done on small cooling fans since they are low-margin commodity items.
However, it is clear that the conventional techniques will soon be inadequate. While active control may seem at first to be a promising solution, there are several technical and financial problems that may be impossible hurdles . So, new approaches to noise reduction will probably come from radical changes in cabinet design unless a concerted effort is made to initiate research on the basic understanding of the noise generation mechanisms in small air-moving devices .
The above discussion assumes that systems will continue to be predominantly cooled using forced-convection. Despite the fact that other thermal management technologies exist, forced-air cooling will remain the predominant technique because it is relatively cheap, highly reliable and designers are well versed in its use. However, given the dissipation trends in chip design, it is clear that hybrid designs that couple forced convection system cooling with “local” cooling of high dissipation chips will become more common. It may be that local cooling technologies such as spray cooling, jet impingement, heat pipes, thermoelectric cooling, and liquid cooling may finally see more widespread use.
Many people within Lucent and other organizations have been kind enough to provide assistance during the preparation of this paper. The author is grateful for their input and cooperation.
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